Technology πŸ“… Sep 09, 2026 πŸ‘οΈ 306 views

The Invisible Backbone: Networking, Storage, and the Software Stack That Powers LLMs

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The GPUs get all the attention, but none of them mean anything without the interconnect that lets thousands of them act as one machine, and the software layer that turns raw hardware into a working AI system.
900GB/s–1.8TB/s
NVLink bandwidth, within one node
~1–2Β΅s
GPU-to-GPU latency over NDR InfiniBand
8
NCCL collective operations covered below

Every blog in this series so far has been about hardware you can point at: a GPU, a server, a rack. This final post is about the parts that don't show up in a product photo β€” the interconnect fabric that lets thousands of GPUs behave like one machine, and the software stack that sits on top of it all. It's the densest topic in the series, so it's split cleanly into two halves: networking and storage first, then the software layer.

PART 1
The Networking Backbone
Inside the Node: NVLink and NVSwitch

NVLink is a high-speed, direct GPU-to-GPU (and CPU-to-GPU) interconnect built specifically to get around the bandwidth bottleneck of PCIe. Depending on the generation, it delivers anywhere from 900GB/s up to 1.8TB/s β€” and critically, NVLink traffic never touches the PCIe bus at all. It's physically a separate link, just packaged in a familiar-looking slot.

NVSwitch takes this further: it's a dedicated switching chip that enables all-to-all GPU communication at full NVLink speed, within a single server. An HGX H200 8-GPU system, for example, ships with four NVSwitch devices to give every GPU a full-speed path to every other GPU.

NVLink and NVSwitch only operate within a single node. The moment you need GPUs on different physical servers to talk to each other, you're in InfiniBand territory instead β€” a completely different part of the stack, covered next.
NVLink Gen
Transfer Rate
Total Links
Found In
1.0
20 GT/s
4
Early Pascal-era systems
2.0
25 GT/s
8
Volta-era systems
3.0
50 GT/s
12
Ampere (A100)
4.0
50 GT/s
18
Hopper (H100, H200)
5.0
100 GT/s
18
Blackwell (B100, B200)

For context: an 8-GPU DGX H100 gets 18 NVLink connections per GPU at 50 GT/s bidirectional (25 GT/s per direction) β€” which is where that 900GB/s per-GPU figure from Part 4 of this series actually comes from.

Between Nodes: InfiniBand, RDMA, and RoCE

Once you scale beyond a single server, a different technology takes over.

Two Layers of Interconnect Server / Node 1 GPU GPU GPU SW NVLink + NVSwitch Server / Node 2 GPU GPU GPU SW NVLink + NVSwitch InfiniBand + RDMA Within a node: NVLink/NVSwitch 900GB/s–1.8TB/s, never leaves the server Between nodes: InfiniBand + RDMA Direct memory access, ~1–2Β΅s latency (NDR)

InfiniBand (IB) is a networking standard purpose-built for HPC: very high throughput, very low latency, using a switch fabric topology rather than the tree-like topology of typical Ethernet. It has gone through several generational names β€” SDR, DDR, QDR, FDR, EDR, HDR, NDR, and now XDR β€” each faster than the last. As a baseline, InfiniBand starts at around 5 microsecond latency, and modern NDR-class fabrics can get down to 1–2 microseconds.

Cable speed matters more than people expect. NDR200 delivers 200Gbps on a single lane, NDR400 doubles that to 400Gbps, and NDR800 doubles it again. Using the wrong cable generation β€” say, NDR200 cabling on a DGX SuperPod built for NDR400 β€” silently caps your bandwidth well below what the hardware is actually capable of. It's an easy, expensive mistake to make during a build-out.

RDMA (Remote Direct Memory Access) is the technology that makes InfiniBand actually useful for GPU workloads: it lets one machine read from, or write directly into, another machine's memory β€” without involving the remote CPU at all, at very low latency and very high throughput. In practice, RDMA is almost never used without InfiniBand underneath it; treat the pairing as one concept.

InfiniBand
RDMA
What it is
A networking standard/fabric β€” cables, switches, signaling, protocol
A capability requiring an RDMA-capable NIC, drivers, and libraries (libibverbs, rdma-core)
Layer
Physical + link layer network
Software/hardware capability riding on top of a network

RoCE (RDMA over Converged Ethernet) is the alternative path: it brings RDMA's benefits to standard Ethernet networks instead of requiring dedicated InfiniBand hardware. RoCE v1 operates at the Ethernet link layer; RoCE v2 operates at the internet layer, making it routable. RoCE can technically run over a standard TCP/IP stack, but that configuration gives up most of the latency benefit β€” expect 20–50 microsecond latency rather than InfiniBand's 1–2 microseconds.

The Hardware That Moves Data: ConnectX NICs and BlueField DPUs

NVIDIA's ConnectX series are the network interface cards (NICs and SmartNICs) that actually plug into servers, supporting up to 400Gb/s of Ethernet or InfiniBand connectivity, with newer generations pushing further: ConnectX-8 SuperNIC reaches 800Gb/s, and ConnectX-9 reaches 1.6Tb/s over PCIe Gen6.

BlueField DPUs (Data Processing Units) go a step further β€” NVIDIA actually coined the term "DPU" to describe a programmable processor that tightly integrates a general-purpose CPU with network interface hardware. Rather than just moving packets, a BlueField DPU can offload entire categories of work from the host CPU: storage protocol handling, RDMA operations, and built-in security functions like firewalling, intrusion detection, and encryption β€” freeing the host's CPU cores for actual compute instead of network plumbing.

A useful mental model: a ConnectX SuperNIC is essentially a BlueField DPU without the onboard processing power. If you just need fast networking, ConnectX is the simpler choice; if you want to offload storage, security, or networking logic away from your host CPU entirely, that's what BlueField is for.
Storage Over the Network: NVMe-oF

NVMe (Non-Volatile Memory Express) is the high-performance storage protocol used by modern SSDs, connecting directly to the CPU over the PCIe bus. NVMe-oF (NVMe over Fabrics) extends that same protocol across a network β€” Ethernet, Fibre Channel, or InfiniBand β€” so a GPU server can read from storage that isn't physically inside it, at close to local-SSD speed. Tunneling NVMe commands through an RDMA fabric specifically is what makes this fast: high throughput, low latency, without round-tripping through a traditional network storage stack.

This is exactly the kind of workload BlueField DPUs are built to offload β€” handling NVMe-oF protocol translation and RDMA operations on the DPU's own ARM cores, rather than burning host CPU cycles on storage networking while your GPUs are trying to train.

Coordinating GPUs at Scale: NCCL and Collective Operations

NCCL (pronounced β€œNickel,” the NVIDIA Collective Communication Library) is what lets you network multiple GPUs together for distributed training or real-time inference without manually tuning for specific hardware topology β€” it detects the topology automatically and exposes a straightforward C-based API.

The core concept is the rank: a unique identifier assigned to each process in a distributed computation. Every GPU gets its own rank, and when you perform a collective operation, every single rank has to call the same operation with matching parameters β€” they're synchronized by design.

AllReduce: The Operation Behind Every Distributed Training Step Before: each rank has its own gradient Rank 0 grad = 2 Rank 1 grad = 5 Rank 2 grad = 1 Rank 3 grad = 4 1. REDUCE (sum: 2+5+1+4 = 12) After: every rank has the SAME reduced value Rank 0 sum = 12 Rank 1 sum = 12 Rank 2 sum = 12 Rank 3 sum = 12 2. BROADCAST result back to every rank Why this matters Every GPU computes its own gradient on its data slice. AllReduce combines them into one consistent gradient so every GPU updates its model weights identically β€” the core operation behind distributed training.
Operation
What It Does
AllReduce
Reduces data (sum, min, max) across all ranks, then stores the identical result back in every rank β€” the core operation behind distributed training gradient updates
Reduce
Same reduction, but the result only goes to one specified root rank
ReduceScatter
The reduced result is scattered in equal-sized chunks across ranks, based on rank index
Broadcast
Copies a buffer from the root rank out to every other rank, unchanged
AllGather
Gathers values from every rank into one combined buffer, then distributes that full buffer back to all ranks
AlltoAll
Each rank sends a different chunk of data to every other rank simultaneously β€” a full exchange
Gather
Gathers values from every rank into a single buffer on one root rank
Scatter
The reverse of Gather β€” distributes chunks from one root rank out to every other rank

If you only remember one of these, make it AllReduce β€” it's the operation running constantly during any multi-GPU training job, since every GPU's locally computed gradient has to be combined and synchronized before the next training step can begin.

Magnum IO: Tying It All Together

Magnum IO is best understood as an umbrella, not a single product: it's NVIDIA's I/O subsystem for data centers, an abstraction layer that ties together most of the networking and storage technology covered above, with a consistent goal of bypassing the CPU wherever possible for better performance.

Category
Includes
Storage I/O
GPUDirect Storage, NVMe SNAP
Network I/O
NVLink, InfiniBand (Quantum), Ethernet, GPUDirect RDMA, HPC-X
In-Network Compute
NCCL, UCX, BlueField DPU offload, SHARP (in-network reductions)
I/O Management
NetQ, UFM (Unified Fabric Manager)
PART 2
The Software Stack That Turns Hardware Into AI

With the networking and storage layer in place, this second half covers the software that actually runs on top of it β€” from training a model to serving it in production.

Triton Inference Server

An open-source server purpose-built for serving models in production. Triton runs across cloud, data center, edge, and embedded deployments, on NVIDIA GPUs, x86/ARM CPUs, and even AWS Inferentia β€” and it can deploy models straight from TensorRT, PyTorch, ONNX, OpenVINO, plain Python, or RAPIDS FIL. It's part of the broader NVIDIA AI Enterprise suite.

TensorRT-LLM and Quantization

TensorRT is NVIDIA's inference optimization ecosystem, tuning a trained model specifically for the target hardware it'll run on. TensorRT-LLM extends this specifically for large language models: convert your model checkpoint into a TensorRT-LLM checkpoint format, build an optimized inference engine from it, then run inference on that engine.

Quantization is the technique that makes this genuinely fast: reducing a model’s numerical precision (say, from BF16 down to FP8) to cut memory footprint and computational cost. TensorRT-LLM supports a range of quantization recipes β€” FP4, FP8 (per-tensor, block-scaling, or row-wise), and 4-bit weight schemes like GPTQ and AWQ. The H100’s Transformer Engine, covered in Part 4 of this series, is purpose-built for exactly this kind of FP8 inference β€” a 70B-parameter model like Llama 70B is commonly quantized to FP8 specifically to run efficiently on it.

Workload
Recommended Approach
Small-batch inference (batch size < 4)
Weight-only quantization
Large-batch inference (batch size up to ~16)
Weight + activation quantization

RAPIDS and cuDF

RAPIDS is NVIDIA's GPU-accelerated data science framework β€” a whole collection of libraries (cuDF, cuML, cuGraph, and others) for running entire data pipelines on the GPU instead of the CPU. cuDF (pronounced β€œKOO-dee-eff”) is the one most people touch directly: a Python GPU DataFrame library, built on the Apache Arrow columnar format, that mirrors pandas for loading, joining, filtering, and aggregating data β€” just running on the GPU.

NeMo Framework

NVIDIA's development platform for building custom generative AI models, covering language models, multimodal and computer vision models, automatic speech recognition, NLP, and text-to-speech. NeMo isn't just a training library β€” it covers the full lifecycle of building, monitoring, and optimizing AI agents.

ONNX and Netron

ONNX (Open Neural Network Exchange) is an open, framework-agnostic model format that most major ML frameworks can export to β€” a common language any framework can use to describe a model's architecture and math, independent of what trained it. A saved model in this format is usually called an "ONNX graph." Netron is the standard tool for actually looking inside one: a free visualizer (browser-based or local) that supports ONNX plus a long list of other formats β€” PyTorch, TensorFlow Lite, Keras, Safetensors, and more β€” letting you inspect a model's structure without writing any code.

NVIDIA Container Toolkit

The set of libraries and utilities that make GPU-accelerated Docker containers actually work β€” including the NVIDIA Container Runtime and the nvidia-ctk CLI. The modern, recommended approach is to use CDI (Container Device Interface), a standardized spec for exposing devices like GPUs to containers:

Running a GPU container
# Run with all GPUs visible, using CDI (recommended)
docker run --device nvidia.com/gpu=all -it my-training-image

# Or select a specific GPU
docker run --gpus device=0 -it my-training-image
If you're troubleshooting GPU-in-container issues on WSL2, a clean install often rules out the most common cause: an NVIDIA driver accidentally installed inside the WSL environment itself, rather than only on the Windows host. You don't need the CUDA Toolkit installed inside the container's base OS either β€” just make sure the runtime is set correctly via nvidia-ctk and restart Docker.

Slurm

Slurm (Simple Linux Utility for Resource Management) is a free, open-source job scheduler used by a large share of the world's supercomputers and GPU clusters, built for traditional HPC-style batch scheduling. In practice, you queue a training job as a script and let Slurm handle allocating the requested GPUs and nodes:

train.slurm
#!/bin/bash
#SBATCH --job-name=llm-train
#SBATCH --gpus=8
#SBATCH --time=24:00:00

srun python train.py --config configs/llama-70b.yaml
When Things Go Wrong: OOM and Troubleshooting

Out of Memory (OOM) errors are one of the most common failure modes in GPU training, and the memory math surprises a lot of people the first time. Here's a concrete example:

Training a 70B-parameter LLM on an 8x H100 cluster using mixed precision (FP16): each H100 has 80GB of memory, for 640GB total. The raw model weights only require about 140GB β€” comfortably within that budget on paper. But full-parameter training typically needs 12–16x the model weight size once you account for optimizer states, gradients, and activations β€” meaning the real requirement can be several times larger than the 640GB you actually have. That gap is exactly what triggers an OOM error mid-training, often well into a long job.

One more infrastructure detail worth knowing: an Out-of-Band (OOB) network is a separate, dedicated management network β€” physically or logically isolated from your production network β€” used to monitor and troubleshoot servers and switches independently. If your main GPU cluster network goes down entirely, an OOB network is what still lets you log in and diagnose the problem rather than being locked out along with everyone else.

Recap: what to take away

  • NVLink/NVSwitch handle GPU-to-GPU communication within a single server; InfiniBand and RDMA take over the moment GPUs are on different physical nodes β€” they solve different problems.
  • RoCE brings RDMA's low-latency benefits to standard Ethernet, trading some latency for not needing dedicated InfiniBand hardware.
  • AllReduce is the one NCCL operation to know cold β€” it's what synchronizes gradients across every GPU on every step of distributed training.
  • The software stack has a rough order: RAPIDS/NeMo for data and training, ONNX as the interchange format, TensorRT-LLM/Triton for serving, and Slurm/Container Toolkit underneath managing it all.
  • OOM errors during full-parameter training are usually a planning problem, not a bug β€” budget 12–16x the raw model weight size, not just the weights themselves.
PART 5 OF 5 Β· NVIDIA SERIES β€” SERIES COMPLETE
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